Saturday, March 28, 2009

Intel 3

Second generation of socket 370-compatible Celeron processors was based on Coppermine core. Like the Mendocino core, the Coppermine core had level 2 cache integrated on the die. The size of level 2 cache didn't change from older PPGA Celerons - it was 128 KB, or half the size of L2 cache of Pentium III Coppermine processors. The cache itself was improved - it featured 256-bit wide path to the cache and had lower latency than the cache of PPGA processors. Another enhancement in Coppermine Celerons was addition of SSE instructions, which could significantly boost processor performance in SSE-enabled applications. Core voltage of the Coppermine processors was reduced from 2.0 Volt to 1.5 - 1.75 Volt, which resulted in lower power consumption and cooler running processors. New package type of these Celerons, with processor die exposed on the top of the chip, also allowed better processor cooling. Coppermine Celeron microprocessors required revised socket 370 - this socket was mechanically, but not electrically compatible with PPGA Socket 370, which made all Copermine CPUs incompatible with many old Socket 370 motherboards.

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